Intel Patents XBM Memory Architecture to Cut HBM Packaging Costs

According to Tom's Hardware, Intel disclosed a patent application on July 2 for a new memory architecture called Cross-Batch Memory (XBM), designed to replace or complement traditional HBM by reducing packaging costs and improving manufacturing yields.

The XBM architecture shifts DRAM transistors to back-end-of-line (BEOL) manufacturing layers and replaces HBM's wide parallel interface with serialized data transmission at 32 GT/s using the UCIe chiplet interconnect standard. Intel emphasizes built-in repair mechanisms and a simplified packaging structure to lower overall costs compared to silicon interposer-based HBM stacks. The patent, originally filed in December 2024, remains at the concept stage with no announced products or timelines.