JEDEC Announces SPHBM4 Standard to Ease AI Chip Advanced Packaging, Boosts Substrate Industry

According to BlockBeats, on July 3, semiconductor research firm SemiAnalysis reported that JEDEC announced the SPHBM4 standard (JESD330-4), which uses the same HBM4 DRAM stack but with different buffer chips. The standard aims to enable HBM assembly in standard packaging while reducing reliance on costly and supply-constrained advanced packaging.

Unlike traditional HBM requiring proximity to GPUs, SPHBM4 uses high-speed serial channels, allowing memory placement up to 20 millimeters away. This expands packaging area and increases substrate material per chip. The 32 Gbps signal transmission through organic substrates requires higher electrical complexity, driving adoption of 20-28 layer high-density ABF substrates and future glass substrates.